SPAR: a schematic place and route system

This paper presents an approach to the automatic generation of schematic diagrams from circuit descriptions. The heuristics which make up the system are based on two principles of schematics readability: Functional Identi cation and Traceability. SPAR's generation process is broken into ve distinct phases: partitioning the netlist, placement of components on the page, global routing, local routing, and the addition of I/O modules. All phases of the generation process use a two dimensional space management technique based on virtual tile spaces. The global router is guided by a cost function consisting of both congestion and wirelength estimates. The local router uses a constraint{propagation technique to optimize the traceability of lines through congested areas. The data structures and algorithms used allow the system to support incremental additions to the schematic without complete regeneration. We describe a technique for evaluating the quality of schematic drawings, and apply this to our results. This paper appeared in the July, 1993 issue of IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (12:7) pp. 956-973.